Top Project Status (08/22/2011 - 19:42:43)
Project File: XTideCPLD1_XC9536_5V_v1_Chuck_mod.xise Parser Errors: No Errors
Module Name: Top Implementation State: Fitted
Target Device: xc9536-15VQ44
  • Errors:
No Errors
Product Version:ISE 13.2
  • Warnings:
13 Warnings (13 new)
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: System Settings
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentma 22. aug 19:42:20 2011013 Warnings (13 new)0
Translation ReportCurrentma 22. aug 19:42:28 2011000
CPLD Fitter Report (Text)Currentma 22. aug 19:42:32 201103 Warnings (3 new)0
Power Report     
 
Secondary Reports [-]
Report NameStatusGenerated
Post-Fit Simulation Model Report  

Date Generated: 08/22/2011 - 19:47:42