Top Project Status (08/22/2011 - 19:42:43) | |||
Project File: | XTideCPLD1_XC9536_5V_v1_Chuck_mod.xise | Parser Errors: | No Errors |
Module Name: | Top | Implementation State: | Fitted |
Target Device: | xc9536-15VQ44 |
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No Errors |
Product Version: | ISE 13.2 |
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13 Warnings (13 new) |
Design Goal: | Balanced |
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Design Strategy: | Xilinx Default (unlocked) |
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Environment: | System Settings |
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Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | Current | ma 22. aug 19:42:20 2011 | 0 | 13 Warnings (13 new) | 0 | |
Translation Report | Current | ma 22. aug 19:42:28 2011 | 0 | 0 | 0 | |
CPLD Fitter Report (Text) | Current | ma 22. aug 19:42:32 2011 | 0 | 3 Warnings (3 new) | 0 | |
Power Report |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
Post-Fit Simulation Model Report |