MiSTer FPGA Forum

It's alive! "audio makes loud noise with some music in the background" The wrong audio codec mode did the noise. I have set "left justified" mode instead I2S. I2S codec mode fix the audio. "Now my port is able to run "Sonic 3D Blast", but it stucks in many places." My other mistake. I decided that the ROM siz...

Why is there an "FF" as part of the ram location, effectively making the system see the ram as FF 15 16, not just 15 16? Main CPU RAM address space is $FF0000-$FFFFFF. Addresses $000000-$400000 is a ROM space (cartridge, read-only usually). Full memory map is avaliable at offical documentation (page 8): https://segaretro.org/Mega_Drive_o...

Nice project! How are you handling the ARM stuff? An external board, or a softcore on the FPGA? As for debugging, I can't speak for other devs, but I tend to simulate individual components using GHDL or Verilator, and debug complete cores with Signaltap. Currently my main goal is a Genesis core for DE2-115. I decided to cut off any ARM stuff and r...

Hello. I'm porting MiSTer Genesis core to Terasic DE2-115 board (Cyclone IV E). Now my port is able to run "Sonic 3D Blast", but it stucks in many places. I tried to made ModelSim testbench for the core, but got compilation errors like this: # -- Compiling module scandoubler # ** Error: /home/github/DE2_115_Genesis/sys/scandoubler.v(61): ...

It's clear now. Thank you paulbnl!

I made a controller is copying ROM image from Flash memory of DE2-115 to SDRAM. If I make increment ioctl_addr equals 2, then I have odd words skipped in the SDRAM. The "FEFE" pattern was loaded to all cells of SDRAM before Genesis core loading to FPGA. The core is modified for DE2-115 board: top level entity ports reconnected to actual p...

you need to look into module instantiation parameters, not default ones. Thank you! WIDE is 1 in sys_top/emu. Why didn't I see it? :) What are you planning to use instead of the de10-nano's HPS stuff? I want to get just a Genesis core on DE2-115 without OSD and special features. Maybe, a special controller with registers available to CPU M68K of t...

Hello! I'm trying to port MiSTER Genesis core to DE2-115 board. The only board I have. The dufficult thing for me is ROM copying to SDRAM. In the emu module (sys_top/emu) I see ROM data write to port zero of sdram module. str 735: .din0({ioctl_data[7:0],ioctl_data[15:8]}), str 737, 738: .wrl0(1), .wrh0(1), There and below str is a string number in ...