MiSTer FPGA Forum

Hello, after a long time, I have completed the design for the new prototype for the FPGA board. There have been a few changes compared to the previous version. Firstly, it now has 64MB SDRAM instead of 32MB SDRAM. However, I achieved this by using two 32MB chips instead of one 64MB chip, as two 32MB chips are cheaper than one 64MB chip. Additionall...

I'm interested in the project and see how it develops. Is there any git repo with all the design sources of the board ? Currently this projekt is on a "lower" priority. I currently working more on a chip tester/programmer project. But I will use this chip tester/programmer to test some SPI based stuff, so this will help me with this proj...

I think RPi + FPGA is probably the future of hardware emulation, and I look forward to seeing how this project develops. The biggest benefit of the De10-nano over other prototyping board is the HDMI port, being able to rely on a Raspberry Pi's hardware instead seems like a slam dunk. Thank for your input. (I don't know if slam dunk is posetive or ...

I made a simple overview blockdiagramm of the system, how I intend it to be (simplified). For the Pi and flashing the FPGA, I will just route the pins for the flash, the pins for jtag (and other technical stuff) and around 30 IO (maybe more) for the pi and an (optional) microcontroller to a pinheader, so I can test a bunch of stuff without the need...

Hello everyone, I am working on a FPGA Board. It uses an ECP5 with 85k LUTs from Lattice. Most here are familiar with the cyclone ones from Intel. Why than did I choose a FPGA from Lattice and not from Intel? For the ECP5 there is a fully open source toolchain. f4pga.org (formaly SymbiFlow) you can find infos about it. This also support the smaller...