A continued look at how to implement a 6502 CPU with RAM and ROM in hardware and Verilog for use in MiSTer cores. The hardware test circuit is analyzed and simulated in Modelsim, with discussion.
MiSTer Core Dev Episode 11: RAM ROM Test
-
Alkadian
- Top Contributor
- Posts: 728
- Joined: Thu May 28, 2020 9:55 am
- Has thanked: 294 times
- Been thanked: 119 times
Re: MiSTer Core Dev Episode 11: RAM ROM Test
@nico24,
I have really enjoyed this episode! BTW congratulations for your new Perytech 32 Channels Logic Analyzer and that smart chip clip
I have really enjoyed this episode! BTW congratulations for your new Perytech 32 Channels Logic Analyzer and that smart chip clip
-
MISTerMark
- Posts: 13
- Joined: Thu Sep 17, 2020 3:28 pm
- Has thanked: 1 time
- Been thanked: 3 times
Re: MiSTer Core Dev Episode 11: RAM ROM Test
I've enjoyed watching your videos, I like how you provide learning resources / books to topics you discuss for futher learning.
I was reading a book recently about trouble shooting the Apple II and it mentioned various tools like logic clips etc -
https://vintageapple.org/apple_ii/pdf/A ... e_1984.pdf
I was reading a book recently about trouble shooting the Apple II and it mentioned various tools like logic clips etc -
https://vintageapple.org/apple_ii/pdf/A ... e_1984.pdf