On a side issue, I have written an FPU core in Silice, a higher-level development language, that can handle double, single and half-precision floating point numbers, not the 80-bit floating point numbers, extended-precision I believe. It easily fits into a ULX3S, mainly due to skipping some rounding modes.
As it is for a RISC-V CPU, it doesn't support sin/cos/tan and other compound operations, they'd need to be implemented by running the algorithms through the units it does have, which are int<->float, precision change, comparisons < and =, sign manipulation, classification, add/sub, mul, div, sqrt and fused-multiply-add.
As it is in Silice it looks very C-like, which may help someone translate it into a hardware description language suitable for MiSTer. For what it is worth, it moves floating-point numbers into double-precision bitfields for operations, for the 68881/68882 it'd need to move floating-point numbers into extend-precision bitfields.
I do not know how feasible this would be, especially implementing the non-core floating-point operations that would be required, and no idea if it'd fit, but someone may want to give it a go.