FPGA Sega Dreamcast?

[pbsk8]

So, no one talking about this here?

FPGA Sega Dreamcast | Work has begun!

[dshadoff]

Well, this is great news, but since it won’t fit within the DE10-nano’s FPGA, it’s really preparation for a “post-MiSTer” device…

[Armakuni]

Ash stated earlier on Twitter :

"I've tried to make it very clear that this is very very early work on a possible future core, for a future FPGA platform.

It might even be necessary to use a real SH4 CPU.

The core is a huge task, obviously. I'm not an "uber dev", it's just laying the groundwork."

[dcubed]

This definitely isn't gonna run on the DE10 nano, but it's great to see someone make a start on a future implementation. I wouldn't expect to see any real tangible results for a good 3-5 years at least though, assuming that Ash can stick it out that long.

Still, exciting to see a glimpse of the future of FPGA console cores nonetheless. And work on the SH4/SH3 would also mean that we could also eventually see the Cave CV-1000 get the FPGA core treatment too! (Speaking of which, since the CV-1000's "GPU" is actually an FPGA solution itself, I wonder if that FPGA code could just be made to run "natively" on a Cyclone V. or similar modern FPGA chip...)

[Waifu4Life]

This definitely isn't gonna run on the DE10 nano, but it's great to see someone make a start on a future implementation. I wouldn't expect to see any real tangible results for a good 3-5 years at least though, assuming that Ash can stick it out that long.

Still, exciting to see a glimpse of the future of FPGA console cores nonetheless. And work on the SH4/SH3 would also mean that we could also eventually see the Cave CV-1000 get the FPGA core treatment too! (Speaking of which, since the CV-1000's "GPU" is actually an FPGA solution itself, I wonder if that FPGA code could just be made to run "natively" on a Cyclone V. or similar modern FPGA chip...)

I can just picture Robert Peip 5 months after completing the N64 core saying: "Well, I was looking for a new challenge"

[Neocaron]

This definitely isn't gonna run on the DE10 nano, but it's great to see someone make a start on a future implementation. I wouldn't expect to see any real tangible results for a good 3-5 years at least though, assuming that Ash can stick it out that long.

Still, exciting to see a glimpse of the future of FPGA console cores nonetheless. And work on the SH4/SH3 would also mean that we could also eventually see the Cave CV-1000 get the FPGA core treatment too! (Speaking of which, since the CV-1000's "GPU" is actually an FPGA solution itself, I wonder if that FPGA code could just be made to run "natively" on a Cyclone V. or similar modern FPGA chip...)

I can just picture Robert Peip 5 months after completing the N64 core saying: "Well, I was looking for a new challenge"

Let's assume you managed to fit everything on the logic side, there is an absolute insurmountable limitation, and that's the clock speed of the FPGA chip, which cannot exceed 100MHz (doesn't even reach that for some). Unfortunately, there is absolutely nothing that can be done to go around this. Maybe an hybrid Dreamcast emulator with some stuff running on the FPGA and the CPU running on the arm CPU could be imaginable. However, the Minimig hybrid venture has encountered obstacles and hit a roadblock, so I wouldn't count on that either.

Always fun to talk about stuff like this, because 3 years ago PSX, Saturn, N64 were all deemed impossible on the Mister, but for the Dreamcast it's just an easy "NOT A CHANCE", unless AI verilog coding gets so good, someone is able to write some magical stuff with AI help.

[aberu]

The bandwidth requirements is not possible on the DE10-Nano.

[FPGAzumSpass]

Highly FPGA optimized soft CPUs (e.g. NIOS2 from Altera themselves) run up to about 170Mhz on the DE10-Nano. That is the absolute maximum you can expect.
Given that other original CPUs are not highly optimized for FPGAs, you can expect lower clock rate.

On newer FPGA architectures this is not a big issue anymore.
Xilinx Ultrascale+ can run their highly optimized 32bit CPU (microblaze) above 400Mhz, so 200-250mhz for CPUs we want should be possible.

The amount of development time for such consoles gets insane.

[metalfacemark]

I think all these ps2/DC/gamecube consoles - the emulation is so well done on them, fpga isnt such an issue for them, sure would be nice, Redream does a fantastic job, or of course a new GDEMU with an original dreamcast and a vga cable still looks fantastic.

[Neocaron]

PS2 emulation is still not perfect after all these years, which is kind of crazy to think about. In a way, FPGA would surely be faster than the 15+ years it took for the PS2 to have good but still imperfect emulation. Xbox emulation is still pretty bad, so the only one that is really good is Dolphin, in my opinion. I can't imagine the amount of work to make an FPGA version of the EE or the NV2A. I guess it will happen at some point for arcade boards of this generation and also just for preservation's sake. Patreon support for these 5+ years projects will definitely make it viable, I'm sure.

[softtest9]

Really cool. I can't wait to see the progress on this and also what kind of FPGA device will end up replacing the de10-nano in the next couple years. I definitely think Dreamcast is possible without any major hybrid emulation (there is some for the CD-based consoles on the MiSTer, but it's only related to the CD drive) on a newer FPGA device.

I also don't understand why some people keep repeating that emulation is so good already, whenever there is a thread about PC, Dreamcast, PS2 etc. SNES emulation is certainly in a much better state than Dreamcast/PS2/GC emulation. You can just watch the video in the first post and see the glitches in Redream. It's also irrelevant to the topic.

[dmckean]

PS2 emulation is still not perfect after all these years, which is kind of crazy to think about. In a way, FPGA would surely be faster than the 15+ years it took for the PS2 to have good but still imperfect emulation. Xbox emulation is still pretty bad, so the only one that is really good is Dolphin, in my opinion. I can't imagine the amount of work to make an FPGA version of the EE or the NV2A. I guess it will happen at some point for arcade boards of this generation and also just for preservation's sake. Patreon support for these 5+ years projects will definitely make it viable, I'm sure.

The PS2 has an FPU that prioritized speed over accuracy and emulating its mistakes is probably something that can't happen anytime in the near future.

[Slipard]

Maybe, just maybe, thinking this way: beginning work now is preparing for the future so that when is the future is ready to become publicly present, we won't have long to wait.

I myself think this way: if DC is eventually done, that is an added security layer for the future, if ever original consoles begins to fail.

Reminder: Super Famcoms were considered like Famicoms, unbreakable. Alas, more and more Super Famicoms are dying from chip failure.

So, just chill out and rather than fighting on pointless quarrels, show support.

[Neocaron]

I don't think anyone was fighting, or I missed something XD I thought it was actually pretty chill for a topic like this :p

[Chilli_Vibes]

Maybe, just maybe, thinking this way: beginning work now is preparing for the future so that when is the future is ready to become publicly present, we won't have long to wait.

The dev said 5 years, so it's much longer than you think. And this is just a Dreamcast, the PS2 is hugely more complex. Someone would have to code the MIPS III Emotion Engine into FPGA, and that ain't going to be easy. And the higher you go above PS2, the more complex it's going to get, with even longer wait times. 10 years from now, you might have a Dreamcast core, maybe a PS2 core, but you won't/never see a PS3 core, Xbox 360 core.
Emulation, by then, would be a superior option. Offering 4k - 8k resolutions, patches for 30fps to 60fps (as already seen in RPCS3), high-res texture packs, overclocking features, etc.. I wouldn't want a PS3 core, when RPCS3, by the time we get to capable FPGA hardware, would be the superior option.

[Slipard]

Maybe, just maybe, thinking this way: beginning work now is preparing for the future so that when is the future is ready to become publicly present, we won't have long to wait.

The dev said 5 years, so it's much longer than you think.

There is always this guy telling another guy what the another guy thinks. That is so entitled, on a level a Gogeta fusion made by a Chad and a Karen would never dream to approach.

I say it as a joke, so please take it as such (or don't, your choice of life.) But, really, don't tell me what I think, unless I wrote it clearly, and especially when you miss the point.

Truth be told, I think I also missed the point: I always thought the forum to be a MiSTer support group and technical dialectic, but I guess it is more arguing pointlessly to kill time.

So, my bad, point taken, open fresh bears and carry on.

[Chilli_Vibes]

There is always this guy telling another guy what the another guy thinks. That is so entitled, on a level a Gogeta fusion made by a Chad and a Karen would never dream to approach.

What the fck are you on about ?
I quoted what the dev who is working on this said, I never said 5 years. GET A GRIP. The dev himself said it would take 1 man at least 5 years, then you clown on about Chad and Karen something...... What the fck does than even mean ? Clown.

[16Bittt]

Dreamcast is well beyond DE10 Nano capabilities..it's a 128 BIT system more close to the 128BIT PS2 specs than 32 BIT PS1/Saturn.
I'm not even 100% sure we'll get a fully functional N64 core.
But I hope I'm wrong.

[J3RK]

Dreamcast is well beyond DE10 Nano capabilities..it's a 128 BIT system more close to the 128BIT PS2 specs than 32 BIT PS1/Saturn.
I'm not even 100% sure we'll get a fully functional N64 core.
But I hope I'm wrong.

The SH4 IIRC is 32 bit RISC.

The PowerVR IC is broken down internally. I can’t remember exact tile rendering details as it’s been a long time since I’ve worked with PowerVR hardware. I’m not sure what width it’s internal registers are, or the width to the VRAM, but I don’t think all of this stacks up to being a “128 bit” system. (Kind of like the Neo Geo not being 24 bit.)

Correct me if I’m wrong. I’m going from memory here.

Anyway, cool to see people tackling hardware like this regardless of what eventual hardware is required to run it.

Definitely worthwhile!

Off to look at DC hardware specs

Memory bus is 64 bit. Still not sure on the overall internals of the series 2 chip though.

[16Bittt]

The SH4 IIRC is 32 bit RISC.

The PowerVR IC is broken down internally. I can’t remember exact tile rendering details as it’s been a long time since I’ve worked with PowerVR hardware. I’m not sure what width it’s internal registers are, or the width to the VRAM, but I don’t think all of this stacks up to being a “128 bit” system. (Kind of like the Neo Geo not being 24 bit.)

Correct me if I’m wrong. I’m going from memory here.

Anyway, cool to see people tackling hardware like this regardless of what eventual hardware is required to run it.

Definitely worthwhile!

Off to look at DC hardware specs

Memory bus is 64 bit. Still not sure on the overall internals of the series 2 chip though.

I'm not a hardware expert but it was advertised and always known to be a 128bit system..it could be a combination of "bits" calculation for marketing reasons,the same way NEOGEO was advertised as 24Bit or PC ENGINE which was advertised as 16BIt while it had a 8 BIT CPU and a 16 BIT GPU if I'm not mistaken..
Dreamcast's Hitachi SH4 CPU is 32Bit,but has 128BIT floating point.

here's something I found about Dreamcast :

The Dreamcast has a 64-bit double-precision superscalar SuperH-4 RISC Central processing unit core with a 32-bit integer unit using 16-bit fixed-length instructions, a 64-bit data bus allowing a variable width of either 8, 16, 32 or 64-bits, and a 128-bit floating-point bus.

The main CPU is a two-way 360 MIPS superscalar Hitachi SH-4 32-bit RISC clocked at 200MHz with an 8 kB instruction cache and 16 kB data cache and a 128-bit graphics-oriented floating-point unit delivering 1.4 GFLOPS.

Its 100 MHz NEC PowerVR2 rendering engine, integrated with the ASIC, can draw more than 3 million polygons per secon and use deferred shading.

The Dreamcast can output approximately 16.77 million colors simultaneously and displays interlaced or progressive scan video at 640 × 480 video resolution.
Its 67 MHz Yamaha AICA sound processo with a 32-bit ARM7 RISC CPU core, can generate 64 voices with PCM or ADPCM.

The Dreamcast has 16 MB main RAM, along with an additional 8 MB of RAM for graphic textures and 2 MB of RAM for sound.

[Jegriva]

Dreamcast is well beyond DE10 Nano capabilities..it's a 128 BIT system more close to the 128BIT PS2 specs than 32 BIT PS1/Saturn.
I'm not even 100% sure we'll get a fully functional N64 core.
But I hope I'm wrong.

The SH4 IIRC is 32 bit RISC.

The PowerVR IC is broken down internally. I can’t remember exact tile rendering details as it’s been a long time since I’ve worked with PowerVR hardware. I’m not sure what width it’s internal registers are, or the width to the VRAM, but I don’t think all of this stacks up to being a “128 bit” system. (Kind of like the Neo Geo not being 24 bit.)

Correct me if I’m wrong. I’m going from memory here.

Anyway, cool to see people tackling hardware like this regardless of what eventual hardware is required to run it.

Definitely worthwhile!

Off to look at DC hardware specs

Memory bus is 64 bit. Still not sure on the overall internals of the series 2 chip though.

The "Bit mythology" strikes again in 2023

I love how people are shocked to know that the Og Xbox was "a 32bit system".

[PistolsAtDawn]

The "Bit mythology" strikes again in 2023

I love how people are shocked to know that the Og Xbox was "a 32bit system".

The Intellivision was a 16 bit system in 1979!

[neogeo81]

So, no one talking about this here?

FPGA Sega Dreamcast | Work has begun!

Why is this here if it's not MiSTer related?

[J3RK]

So, no one talking about this here?

FPGA Sega Dreamcast | Work has begun!

Why is this here if it's not MiSTer related?

I don't see a problem with it. It's FPGA / Console discussion. It probably won't apply to the current iteration of the DE10 based MiSTer, but it's still ok to talk about similar technologies I would think. It's just one thread, and it's in the "Other" sub.

[Chol]

Repo was made public a few hours ago: https://github.com/ElectronAsh/DC_MiSTer

[thorr]

Interesting! I don't expect this to ever go to a full core on the MiSTer, but for now maybe it can at least play Crysis.

[Chris23235]

Repo was made public a few hours ago: https://github.com/ElectronAsh/DC_MiSTer

And anyone should be made aware of 2 points:

This is NOT, I repeat NOT anywhere close to a full "core" right now.

This is just some tests for the low-level part of the PowerVR2 renderer, but also done as a learning experience.

At the start of this process, I didn't think I'd even be able to wrap my brain around parsing the VRAM structs to actually render anything. lol

There is NO promise of a finished core here, but we'll see where it goes.

and

Only HDMI is working atm, via the ASCAL scaler. NOTE: The VGA/RGB output will NOT have correct timings for 15KHz nor 31KHz right now, so please be aware not to hook up a CRT monitor!

[Nico Klem]

A small video (multi languages) about this Dreamcast PVR Project :

https://youtu.be/ke-L7F7HKY8

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